Emulation systems may comprise hardware components, such as emulation chips and processors, capable of processor-based (e.g., hardware-based) emulation of logic systems, such as integrated circuits (ICs), application specific integrated circuits (ASICs), central processing units (CPUs), graphics processing units (GPU), field-programmable gate arrays (FPGAs), and the like. By executing various forms of programmable logic, the emulation chips may be programmed to mimic the functionality of nearly any prototype logic system design that is undergoing testing. Processor-based emulation allows logic system designers to prototype a logic system's design, before a manufacturer expends resources manufacturing a logic system product based on the design.
After emulation system customers or users (e.g., logic system designers) submit their design for emulation from their computing devices, the users may logically and/or physically attach to the emulator system a hardware target device, such as a target pod, which communicates data signals regarding to the ongoing emulation. In the past, target connections have always been statically tied to specific domains of the emulator system, which are predefined collections of system resources assigned to execute an emulation. But when an assigned domain was in use for another processing job or was otherwise unavailable, the target could neither transmit input signals to the emulator system, nor receive outputs from the emulator system. In sum, even though a problem would be isolated to just one or more domains of the emulation system, the emulator system would be rendered altogether unavailable to the target. Thus, one user could not test their logic system design, while others could, and while other portions of the emulation system were still operational or otherwise available.
Ultimately, the practical effect of this shortcoming is underutilization, or less-than-optimal use of the emulator system and its components. For instance, the workload of busy domains cannot be shifted to available domains. In addition, the static relationships between domains and target connections often make it difficult to debug problems with the targets and the logic system being tested, because it can be difficult to locate where problems exist—e.g., determining whether poor performance lies with the design of the logic system being tested or the hosting test bench components of the emulation system.
What is needed is a means of breaking up the static relationship that exists in conventional emulation systems between domains and target connections. Also, what is needed is a means for dynamically associating domains with target connections, and, in some cases, a means for dynamically identifying the need to update or generate associations between domains and target connections. In order to allow targets to be connected to any number of multiple domains, what is needed is a means for allowing domains and targets to be allocated and scheduled independently from other targets and other domains.